////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
//
//
// This file is part of the Microsoft .NET Micro Framework Porting Kit Code Samples and is unsupported.
// Copyright (C) Microsoft Corporation. All rights reserved. Use of this sample source code is subject to
// the terms of the Microsoft license agreement under which you licensed this sample source code.
//
// THIS SAMPLE CODE AND INFORMATION ARE PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED OR IMPLIED,
// INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A PARTICULAR PURPOSE.
//
//
////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

#ifndef _PLATFORM_HAG_SELECTOR_H_
#define _PLATFORM_HAG_SELECTOR_H_ 1


/////////////////////////////////////////////////////////
//
// feature switches
//
#define SHALL_I_USE_DHCP					1
//
// feature switches
//
/////////////////////////////////////////////////////////

/////////////////////////////////////////////////////////
//
// processor and features
//

#if defined(PLATFORM_ARM_HAG)
#define HAL_SYSTEM_NAME                 "EMIC HAG"
#define PLATFORM_ARM_SAM9261_ANY        1

//
// processor and features
//
/////////////////////////////////////////////////////////


/////////////////////////////////////////////////////////
//
// constants
//

#define SYSTEM_CYCLE_CLOCK_HZ           198656000
#define SYSTEM_PERIPHERAL_CLOCK_HZ      (SYSTEM_CYCLE_CLOCK_HZ / 2)
#define SYSTEM_CLOCK_HZ                 (SYSTEM_PERIPHERAL_CLOCK_HZ / 32)

// SLOW CLOCK
#define CLOCK_COMMON_FACTOR             8000
#define SLOW_CLOCKS_PER_SECOND          32768
#define SLOW_CLOCKS_TEN_MHZ_GCD         128
#define SLOW_CLOCKS_MILLISECOND_GCD     8

// MEMORY SETUP

// undefine to disable wearleveling
#define USE_WEAR_LEVELING				1

// NAND VIRTUAL BASE ADDRESSS
#define FLASH_BASE_ADDRESS				0x20000000

#define FLASH_MEMORY_Base   			0x00000000
#define FLASH_MEMORY_Size   			0x00540000

#define SRAM1_MEMORY_Base   			0x20000000
#define SDRAM_MEMORY_Base   			0x20000000

#if defined (SDRAM64)
#define SRAM1_MEMORY_Size   			0x04000000
#define SDRAM_MEMORY_Size   			(64*1024*1024)
#elif defined (SDRAM32)
#define SRAM1_MEMORY_Size   			0x02000000
#define SDRAM_MEMORY_Size   			(32*1024*1024)
#endif

#define SRAM_MEMORY_Base    			0x00300000
#define SRAM_MEMORY_Size    			(160*1024)

#define TXPROTECTRESISTOR               RESISTOR_DISABLED
#define RXPROTECTRESISTOR               RESISTOR_DISABLED
#define CTSPROTECTRESISTOR              RESISTOR_DISABLED
#define RTSPROTECTRESISTOR              RESISTOR_DISABLED

#define INSTRUMENTATION_H_GPIO_PIN      GPIO_PIN_NONE

#define DEBUG_TEXT_PORT    COM1
#define STDIO              COM1
#define DEBUGGER_PORT      TCP_DEBUG
#define MESSAGING_PORT     TCP_DEBUG

// undefine to get full output
#define MINIMAL_STARTUP_MESSAGE			1
/*
    BUTTON_B0    - Backlight
    BUTTON_B1    - Undefined
    BUTTON_B2    - Up
    BUTTON_B3    - Undefined
    BUTTON_B4    - Select
    BUTTON_B5    - Down
*/
#define DRIVER_PAL_BUTTON_MAPPING           \
    { GPIO_PIN_NONE, 			 BUTTON_B0 },  \
    { GPIO_PIN_NONE, 			 BUTTON_B1 },  \
    { HAG_I2C_GPIO_Driver::I2C0, BUTTON_B2 },  \
    { HAG_I2C_GPIO_Driver::I2C1, BUTTON_B3 },  \
    { HAG_I2C_GPIO_Driver::I2C2, BUTTON_B4 },  \
    { HAG_I2C_GPIO_Driver::I2C3, BUTTON_B5 },

#define AT91_UDP_MATRIX_PULLUP      1
#define AT91_VBUS_DETECTION         1
#define AT91_VBUS                   AT91_GPIO_Driver::PC11

#if defined (SDRAM64)
#define LCD_BUFFER_BASE				0x23F00000
#elif defined (SDRAM32)
#define LCD_BUFFER_BASE				0x21F00000
#endif

#define LCD_BIT_PIX 4
#define LCD_RGB_CONVERTION  1

#define PSELECTOR_SHALL_I_LOAD_DEPLOYMENT()	(!(CPU_GPIO_GetPinState(97) && CPU_GPIO_GetPinState(98)))

/*
#define AT91_NAND_CE		AT91_GPIO_Driver::PC14
#define AT91_NAND_RB		AT91_GPIO_Driver::PC15
*/
//
// constants
/////////////////////////////////////////////////////////

/////////////////////////////////////////////////////////
//
// macros
//

#define GLOBAL_LOCK(x)             SmartPtr_IRQ x
#define DISABLE_INTERRUPTS()       SmartPtr_IRQ::ForceDisabled()
#define ENABLE_INTERRUPTS()        SmartPtr_IRQ::ForceEnabled()
#define INTERRUPTS_ENABLED_STATE() SmartPtr_IRQ::GetState()
#define GLOBAL_LOCK_SOCKETS(x)     SmartPtr_IRQ x

#if defined(_DEBUG)
#define ASSERT_IRQ_MUST_BE_OFF()   ASSERT(!SmartPtr_IRQ::GetState())
#define ASSERT_IRQ_MUST_BE_ON()    ASSERT( SmartPtr_IRQ::GetState())
#else
#define ASSERT_IRQ_MUST_BE_OFF()
#define ASSERT_IRQ_MUST_BE_ON()
#endif


//
// macros
//
/////////////////////////////////////////////////////////

/////////////////////////////////////////////////////////
//
// global functions
//

//
// global functions
//
/////////////////////////////////////////////////////////

/////////////////////////////////////////////////////////
// communicaiton facilities
//

// Port definitions
#define TOTAL_USART_PORT       7
#define FIRST_EXTERN_CHANNEL   3

#define COM1                   ConvertCOM_ComHandle(0)
#define COM2                   ConvertCOM_ComHandle(1)
#define COM3                   ConvertCOM_ComHandle(2)
#define COM4                   ConvertCOM_ComHandle(3)
#define COM5                   ConvertCOM_ComHandle(4)
#define COM6                   ConvertCOM_ComHandle(5)
#define COM7                   ConvertCOM_ComHandle(6)

#define TOTAL_USB_CONTROLLER   1
#define USB1                   ConvertCOM_UsbHandle(0)

#define TOTAL_SOCK_PORT        1
#define TCP_DEBUG              ConvertCOM_SockHandle(0)


#define TOTAL_DEBUG_PORT       1
#define COM_DEBUG              ConvertCOM_DebugHandle(0)

#define COM_MESSAGING          ConvertCOM_MessagingHandle(0)

#define USART_TX_IRQ_INDEX(x)       ( (x) ? 0 : 0 )     /* TODO set right indexes */
#define USART_DEFAULT_PORT          COM1
#define USART_DEFAULT_BAUDRATE      115200

#define USB_IRQ_INDEX               0  // TODO set right index

#define XR16L78X_USART_USE_PIO_IRQ	(AT91_GPIO_Driver::PC6)
#define XR16L78X_USART_INT_LINE		0
#define XR16L78X_BASE_ADDR			0x50000000

#define PLATFORM_DEPENDENT_TX_USART_BUFFER_SIZE    (4*1024)  // there is one TX for each usart port
#define PLATFORM_DEPENDENT_RX_USART_BUFFER_SIZE    (4*1024)  // there is one RX for each usart port
#define PLATFORM_DEPENDENT_USB_QUEUE_PACKET_COUNT  32    // there is one queue for each pipe of each endpoint and the size of a single packet is sizeof(USB_PACKET64) == 68 bytes

#define TOTAL_SPI_PORT       	2

#define AT91_SPI0_CS0			AT91_GPIO_Driver::PA3
#define AT91_SPI0_CS1			AT91_GPIO_Driver::PA4
#define AT91_SPI0_CS2			AT91_GPIO_Driver::PA5
#define AT91_SPI0_CS3			GPIO_PIN_NONE

#define AT91_SPI1_CS0			GPIO_PIN_NONE
#define AT91_SPI1_CS1			GPIO_PIN_NONE
#define AT91_SPI1_CS2			GPIO_PIN_NONE
#define AT91_SPI1_CS3			AT91_GPIO_Driver::PC15

// SOCKETS
#undef DEBUG_LEVEL
#define DEBUG_LEVEL 1

#define AX88796_SOCKETS_ENABLED             1

#if AX88796_SOCKETS_ENABLED
#define MAC_ADDR_FROM_JACK					0x20FFFF00
#define MAC_ADDR_FROM_JACK_SIZE				0x000000FC

#define USE_THIS_IP_ADDR					SOCK_MAKE_IP_ADDR_LITTLEEND(172, 31, 31, 44)
#define USE_THIS_IP_MASK					SOCK_MAKE_IP_ADDR_LITTLEEND(255,255,  0,  0)
#define USE_THIS_GATEWAY					SOCK_MAKE_IP_ADDR_LITTLEEND(172, 31, 31,240)
#define USE_THIS_DNS_SERVER					SOCK_MAKE_IP_ADDR_LITTLEEND(172, 31, 31,240)

#define AX88796_BASE_ADDRESS				0x30000000
#define AX88796_IRQ_PIN						AT91_GPIO_Driver::PC7

#define AX88796B_DEVICE                     50

#define NETWORK_INTERFACE_INDEX_AX88796B    0
#define NETWORK_INTERFACE_COUNT             1

//#define PLATFORM_DEPENDENT__SOCKETS_MAX_COUNT	32
#define NETWORK_MEMORY_PROFILE__medium      1
#include <Network_Defines.h>

// #define NETWORK_USE_LOOPBACK                1
#define NETWORK_USE_DHCP                    1
#endif

//
// communicaiton facilities
/////////////////////////////////////////////////////////

/////////////////////////////////////////////////////////
// GPIO
#define I2C_GPIO_IRQ_PIN					AT91_GPIO_Driver::PC5
#define HAG_I2C_MAX_GPIO					(AT91_MAX_GPIO+8)
#define HAG_XR16l784_MAX_GPIO				(HAG_I2C_MAX_GPIO+12)
void I2C_IS_UP();	
// GPIO
/////////////////////////////////////////////////////////


#define PLATFORM_DEPENDENT_FATFS_SECTORCACHE_MAXSIZE 4
#define PLATFORM_DEPENDENT_FATFS_MAX_OPEN_HANDLES    8
#define PLATFORM_DEPENDENT_FATFS_MAX_VOLUMES         2

// modified at91.h so, that HAG_AT91_SAM9261 is included instead of AT91_SAM9261.h
#include <processor_selector.h>
#include "DeviceCode\HAG.h"

#endif // PLATFORM_ARM_HAG

#endif // _PLATFORM_HAG_SELECTOR_H_
